; generated by Component: ARM Compiler 5.06 update 4 (build 422) Tool: ArmCC [4d3604]
; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave -o.\obj\lib_driver_flash_pan159.o --asm_dir=.\lst\ --list_dir=.\lst\ --depend=.\obj\lib_driver_flash_pan159.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\..\Library\CMSIS\Include -I..\..\..\Library\Device\Nuvoton\Mini58Series\Include -I..\..\..\Library\StdDriver\inc -I..\..\Template -I..\..\..\Library\StdDriver\driver -I.\RTE\_Template -ID:\Keil_v5\ARM\PACK\Nuvoton\NuMicro_DFP\1.0.9\Device\Mini58\Include -ID:\Keil_v5\ARM\CMSIS\Include -D__MICROLIB -D__UVISION_VERSION=523 --omf_browse=.\obj\lib_driver_flash_pan159.crf ..\..\..\Library\StdDriver\driver\lib_driver_flash_pan159.c]
                          THUMB

                          AREA ||i.SYS_UnlockReg||, CODE, READONLY, ALIGN=2

                  SYS_UnlockReg PROC
;;;417      */
;;;418    __STATIC_INLINE void SYS_UnlockReg(void)
000000  b510              PUSH     {r4,lr}
;;;419    {
;;;420        do
;;;421        {
;;;422            SYS->REGLCTL = 0x59;
000002  2159              MOVS     r1,#0x59
000004  4804              LDR      r0,|L1.24|
;;;423            SYS->REGLCTL = 0x16;
000006  2216              MOVS     r2,#0x16
;;;424            SYS->REGLCTL = 0x88;
000008  2388              MOVS     r3,#0x88
                  |L1.10|
00000a  6001              STR      r1,[r0,#0]            ;422
00000c  6002              STR      r2,[r0,#0]            ;423
00000e  6003              STR      r3,[r0,#0]
;;;425        }
;;;426        while(SYS->REGLCTL == 0);
000010  6804              LDR      r4,[r0,#0]
000012  2c00              CMP      r4,#0
000014  d0f9              BEQ      |L1.10|
;;;427    }
000016  bd10              POP      {r4,pc}
;;;428    
                          ENDP

                  |L1.24|
                          DCD      0x50000100

                          AREA ||i.flash_pan159_erase||, CODE, READONLY, ALIGN=2

                  flash_pan159_erase PROC
;;;19     *******************************************************************************/
;;;20     void flash_pan159_erase(uint32_t addr, uint16_t sectors)
000000  b5f8              PUSH     {r3-r7,lr}
;;;21     {
000002  460d              MOV      r5,r1
000004  4606              MOV      r6,r0
;;;22         SYS_UnlockReg();
000006  f7fffffe          BL       SYS_UnlockReg
;;;23         FMC_Open();
00000a  f7fffffe          BL       FMC_Open
;;;24         FMC_ENABLE_SP_UPDATE();
00000e  4c0b              LDR      r4,|L2.60|
000010  6820              LDR      r0,[r4,#0]
000012  2704              MOVS     r7,#4
000014  4338              ORRS     r0,r0,r7
000016  6020              STR      r0,[r4,#0]
;;;25         while(sectors != 0)
000018  e005              B        |L2.38|
                  |L2.26|
;;;26         {
;;;27             FMC_Erase(addr);
00001a  4630              MOV      r0,r6
00001c  f7fffffe          BL       FMC_Erase
000020  1e6d              SUBS     r5,r5,#1
;;;28             addr += 128;
;;;29             sectors--;
000022  b2ad              UXTH     r5,r5
000024  3680              ADDS     r6,r6,#0x80
                  |L2.38|
000026  2d00              CMP      r5,#0                 ;25
000028  d1f7              BNE      |L2.26|
;;;30         }
;;;31         FMC_DISABLE_SP_UPDATE();
00002a  6820              LDR      r0,[r4,#0]
00002c  43b8              BICS     r0,r0,r7
00002e  6020              STR      r0,[r4,#0]
;;;32         FMC_Close();
000030  f7fffffe          BL       FMC_Close
000034  4902              LDR      r1,|L2.64|
000036  2000              MOVS     r0,#0
000038  6008              STR      r0,[r1,#0]
;;;33         SYS_LockReg();
;;;34     }
00003a  bdf8              POP      {r3-r7,pc}
;;;35     
                          ENDP

                  |L2.60|
                          DCD      0x5000c000
                  |L2.64|
                          DCD      0x50000100

                          AREA ||i.flash_pan159_read||, CODE, READONLY, ALIGN=2

                  flash_pan159_read PROC
;;;98     *******************************************************************************/
;;;99     void flash_pan159_read(uint32_t addr, void* p_data, uint16_t len)
000000  b5f7              PUSH     {r0-r2,r4-r7,lr}
;;;100    {
000002  b082              SUB      sp,sp,#8
000004  4615              MOV      r5,r2
000006  460e              MOV      r6,r1
;;;101        #define PTR32   ((uint32_t*)p_data)
;;;102        #define PTR8    ((uint8_t*)p_data)
;;;103        #define TMP     (*((uint32_t*)tmp))
;;;104        uint16_t i;
;;;105        uint8_t tmp[4];
;;;106    
;;;107        SYS_UnlockReg();
000008  f7fffffe          BL       SYS_UnlockReg
;;;108        FMC_Open();
00000c  f7fffffe          BL       FMC_Open
;;;109        FMC_ENABLE_SP_UPDATE();
000010  481c              LDR      r0,|L3.132|
000012  6801              LDR      r1,[r0,#0]
000014  2204              MOVS     r2,#4
000016  4311              ORRS     r1,r1,r2
000018  6001              STR      r1,[r0,#0]
;;;110        for(i = 0; i < (len>>2); i++)
00001a  2400              MOVS     r4,#0
00001c  08af              LSRS     r7,r5,#2
00001e  e009              B        |L3.52|
                  |L3.32|
;;;111        {
;;;112            PTR32[i] = FMC_Read(addr);
000020  9802              LDR      r0,[sp,#8]
000022  f7fffffe          BL       FMC_Read
000026  00a1              LSLS     r1,r4,#2
000028  5070              STR      r0,[r6,r1]
;;;113            addr += 4;
00002a  9802              LDR      r0,[sp,#8]
00002c  1d00              ADDS     r0,r0,#4
00002e  1c64              ADDS     r4,r4,#1
000030  b2a4              UXTH     r4,r4                 ;110
000032  9002              STR      r0,[sp,#8]            ;110
                  |L3.52|
000034  42a7              CMP      r7,r4                 ;110
000036  d8f3              BHI      |L3.32|
000038  04a0              LSLS     r0,r4,#18             ;110
;;;114        }
;;;115        i <<= 2;
00003a  0c04              LSRS     r4,r0,#16
;;;116        if(i < len)
00003c  42ac              CMP      r4,r5
00003e  d214              BCS      |L3.106|
;;;117        {
;;;118            TMP = FMC_Read(addr);
000040  9802              LDR      r0,[sp,#8]
000042  f7fffffe          BL       FMC_Read
;;;119            PTR8[i++] = tmp[0];
000046  9000              STR      r0,[sp,#0]
000048  4668              MOV      r0,sp
00004a  7800              LDRB     r0,[r0,#0]
00004c  5530              STRB     r0,[r6,r4]
00004e  1c64              ADDS     r4,r4,#1
000050  b2a0              UXTH     r0,r4
;;;120            if(i < len)
000052  42a8              CMP      r0,r5
000054  d209              BCS      |L3.106|
;;;121            {
;;;122                PTR8[i++] = tmp[1];
000056  4669              MOV      r1,sp
000058  7849              LDRB     r1,[r1,#1]
00005a  5431              STRB     r1,[r6,r0]
00005c  1c40              ADDS     r0,r0,#1
00005e  b280              UXTH     r0,r0
;;;123                if(i < len)
000060  42a8              CMP      r0,r5
000062  d202              BCS      |L3.106|
;;;124                {
;;;125                    PTR8[i] = tmp[2];
000064  4669              MOV      r1,sp
000066  7889              LDRB     r1,[r1,#2]
000068  5431              STRB     r1,[r6,r0]
                  |L3.106|
;;;126                }
;;;127            }
;;;128        }
;;;129        FMC_DISABLE_SP_UPDATE();
00006a  4806              LDR      r0,|L3.132|
00006c  6801              LDR      r1,[r0,#0]
00006e  2204              MOVS     r2,#4
000070  4391              BICS     r1,r1,r2
000072  6001              STR      r1,[r0,#0]
;;;130        FMC_Close();
000074  f7fffffe          BL       FMC_Close
000078  4903              LDR      r1,|L3.136|
00007a  2000              MOVS     r0,#0
00007c  6008              STR      r0,[r1,#0]
;;;131        SYS_LockReg();
;;;132    
;;;133        #undef  TMP
;;;134        #undef  PTR8
;;;135        #undef  PTR32
;;;136    }
00007e  b005              ADD      sp,sp,#0x14
000080  bdf0              POP      {r4-r7,pc}
                          ENDP

000082  0000              DCW      0x0000
                  |L3.132|
                          DCD      0x5000c000
                  |L3.136|
                          DCD      0x50000100

                          AREA ||i.flash_pan159_write||, CODE, READONLY, ALIGN=2

                  flash_pan159_write PROC
;;;44     *******************************************************************************/
;;;45     void flash_pan159_write(uint32_t addr, void* p_data, uint16_t len)
000000  b5f7              PUSH     {r0-r2,r4-r7,lr}
;;;46     {
;;;47         #define PTR32   ((uint32_t*)p_data)
;;;48         #define PTR8    ((uint8_t*)p_data)
;;;49         uint16_t i;
;;;50         union{
;;;51             uint32_t u32;
;;;52             struct{
;;;53                 uint8_t x0;
;;;54                 uint8_t x1;
;;;55                 uint8_t x2;
;;;56                 uint8_t x3;
;;;57             }u8;
;;;58         }tmp;
;;;59         tmp.u32 = 0xFFFFFFFF;
000002  2000              MOVS     r0,#0
000004  b082              SUB      sp,sp,#8              ;46
000006  43c0              MVNS     r0,r0
000008  4615              MOV      r5,r2                 ;46
00000a  460e              MOV      r6,r1                 ;46
;;;60     
;;;61         SYS_UnlockReg();
00000c  9000              STR      r0,[sp,#0]
00000e  f7fffffe          BL       SYS_UnlockReg
;;;62         FMC_Open();
000012  f7fffffe          BL       FMC_Open
;;;63         FMC_ENABLE_SP_UPDATE();
000016  481b              LDR      r0,|L4.132|
000018  6801              LDR      r1,[r0,#0]
00001a  2204              MOVS     r2,#4
00001c  4311              ORRS     r1,r1,r2
00001e  6001              STR      r1,[r0,#0]
;;;64         for(i = 0; i < (len>>2); i++)
000020  2400              MOVS     r4,#0
000022  08af              LSRS     r7,r5,#2
000024  e009              B        |L4.58|
                  |L4.38|
000026  00a0              LSLS     r0,r4,#2
;;;65         {
;;;66             FMC_Write(addr,PTR32[i]);
000028  5831              LDR      r1,[r6,r0]
00002a  9802              LDR      r0,[sp,#8]
00002c  f7fffffe          BL       FMC_Write
;;;67             addr += 4;
000030  9802              LDR      r0,[sp,#8]
000032  1d00              ADDS     r0,r0,#4
000034  1c64              ADDS     r4,r4,#1
000036  b2a4              UXTH     r4,r4                 ;64
000038  9002              STR      r0,[sp,#8]            ;64
                  |L4.58|
00003a  42a7              CMP      r7,r4                 ;64
00003c  d8f3              BHI      |L4.38|
00003e  04a0              LSLS     r0,r4,#18             ;64
;;;68         }
;;;69         i <<= 2;
000040  0c00              LSRS     r0,r0,#16
;;;70         if(i < len)
000042  42a8              CMP      r0,r5
000044  d212              BCS      |L4.108|
;;;71         {
;;;72             tmp.u8.x0 = PTR8[i++];
000046  5c31              LDRB     r1,[r6,r0]
000048  1c40              ADDS     r0,r0,#1
00004a  466a              MOV      r2,sp
00004c  b280              UXTH     r0,r0
00004e  7011              STRB     r1,[r2,#0]
;;;73             if(i < len)
000050  42a8              CMP      r0,r5
000052  d207              BCS      |L4.100|
;;;74             {
;;;75                 tmp.u8.x1 = PTR8[i++];
000054  5c31              LDRB     r1,[r6,r0]
000056  1c40              ADDS     r0,r0,#1
000058  b280              UXTH     r0,r0
00005a  7051              STRB     r1,[r2,#1]
;;;76                 if(i < len)
00005c  42a8              CMP      r0,r5
00005e  d201              BCS      |L4.100|
;;;77                 {
;;;78                     tmp.u8.x2 = PTR8[i];
000060  5c30              LDRB     r0,[r6,r0]
000062  7090              STRB     r0,[r2,#2]
                  |L4.100|
;;;79                 }
;;;80             }
;;;81             FMC_Write(addr,tmp.u32);
000064  9900              LDR      r1,[sp,#0]
000066  9802              LDR      r0,[sp,#8]
000068  f7fffffe          BL       FMC_Write
                  |L4.108|
;;;82         }
;;;83         FMC_DISABLE_SP_UPDATE();
00006c  4805              LDR      r0,|L4.132|
00006e  6802              LDR      r2,[r0,#0]
000070  2104              MOVS     r1,#4
000072  438a              BICS     r2,r2,r1
000074  6002              STR      r2,[r0,#0]
;;;84         FMC_Close();
000076  f7fffffe          BL       FMC_Close
00007a  4903              LDR      r1,|L4.136|
00007c  2000              MOVS     r0,#0
00007e  6008              STR      r0,[r1,#0]
;;;85         SYS_LockReg();
;;;86     
;;;87         #undef  PTR8
;;;88         #undef  PTR32
;;;89     }
000080  b005              ADD      sp,sp,#0x14
000082  bdf0              POP      {r4-r7,pc}
;;;90     
                          ENDP

                  |L4.132|
                          DCD      0x5000c000
                  |L4.136|
                          DCD      0x50000100

;*** Start embedded assembler ***

#line 1 "..\\..\\..\\Library\\StdDriver\\driver\\lib_driver_flash_pan159.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___25_lib_driver_flash_pan159_c_d766fa64____REV16|
#line 388 "..\\..\\..\\Library\\CMSIS\\Include\\cmsis_armcc.h"
|__asm___25_lib_driver_flash_pan159_c_d766fa64____REV16| PROC
#line 389

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___25_lib_driver_flash_pan159_c_d766fa64____REVSH|
#line 402
|__asm___25_lib_driver_flash_pan159_c_d766fa64____REVSH| PROC
#line 403

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
